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Strany 1 - User’s Guide

i.MX53 System DevelopmentUser’s GuideSupportsi.MX53MX53UGRev. 13/2011

Strany 2 - How to Reach Us:

i.MX53 System Development User’s Guide, Rev. 1x Freescale Semiconductor ContentsParagraphNumber TitlePageNumberChapter 22 Porting the Fast Ethernet C

Strany 3

Setting up Power Managementi.MX53 System Development User’s Guide, Rev. 15-4 Freescale Semiconductor Table 5-1 shows the i.MX53 voltage rails, their p

Strany 4

Setting up Power Managementi.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 5-5 VDD_FUSE Fusebox program supply (Write only)3.15

Strany 5

Setting up Power Managementi.MX53 System Development User’s Guide, Rev. 15-6 Freescale Semiconductor 5.2.1 Connecting Power and Communication SignalsF

Strany 6

Setting up Power Managementi.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 5-7 Figure 5-4. Communication Signal ConnectionsNVCC

Strany 7

Setting up Power Managementi.MX53 System Development User’s Guide, Rev. 15-8 Freescale Semiconductor Figure 5-5 shows the power-up sequence of the int

Strany 8

Setting up Power Managementi.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 5-9 5.3 Interfacing the i.MX53 Processor with LTC3589

Strany 9

Setting up Power Managementi.MX53 System Development User’s Guide, Rev. 15-10 Freescale Semiconductor 5.3.2 I2C AcknowledgeThe acknowledge signal is u

Strany 10 - Contents

Setting up Power Managementi.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 5-11 NVCC_CKIH ESD protection of the CKIH pins, Fuse

Strany 11 - Freescale Semiconductor xi

Setting up Power Managementi.MX53 System Development User’s Guide, Rev. 15-12 Freescale Semiconductor 5.5 Connecting Power and Communication SignalsFi

Strany 12

Setting up Power Managementi.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 5-13 Figure 5-8. Power Connections Block, cont. (LTC3

Strany 13 - Freescale Semiconductor xiii

i.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor xi FiguresFigureNumber TitlePageNumberFigures1-1 Boot Configuration Bus Isolatio

Strany 14 - Number Title

Setting up Power Managementi.MX53 System Development User’s Guide, Rev. 15-14 Freescale Semiconductor Figure 5-9. Communication Signals Connections Bl

Strany 15 - Freescale Semiconductor xiv

Setting up Power Managementi.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 5-15 Figure 5-10. Communication Signals Connections B

Strany 16

Setting up Power Managementi.MX53 System Development User’s Guide, Rev. 15-16 Freescale Semiconductor 5.5.1 Powering-up the InterfaceFigure 5-11 shows

Strany 17 - About This Guide

Setting up Power Managementi.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 5-17 5.6 Additional Device InformationThis section pr

Strany 18 - Organization

Setting up Power Managementi.MX53 System Development User’s Guide, Rev. 15-18 Freescale Semiconductor Figure 5-12 shows the DA9053 application block d

Strany 19 - Essential Reference

Setting up Power Managementi.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 5-19 Table 5-3 shows the generated supply domains.Tab

Strany 20 - Acronyms and Abbreviations

Setting up Power Managementi.MX53 System Development User’s Guide, Rev. 15-20 Freescale Semiconductor 5.6.2 LTC3589-1The LTCR3589 is a complete soluti

Strany 21

Setting up Power Managementi.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 5-21 Figure 5-13 shows a typical application block gu

Strany 22

Setting up Power Managementi.MX53 System Development User’s Guide, Rev. 15-22 Freescale Semiconductor

Strany 23

i.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 6-1 Chapter 6 Interfacing DDR2 and DDR3 Memories with the i.MX53 ProcessorThis

Strany 24

i.MX53 System Development User’s Guide, Rev. 1xii Freescale Semiconductor FiguresFigureNumber TitlePageNumber4-9 Display of Other Signals Available on

Strany 25 - Hardware Design and Bring-up

Interfacing DDR2 and DDR3 Memories with the i.MX53 Processori.MX53 System Development User’s Guide, Rev. 16-2 Freescale Semiconductor Figure 6-1 shows

Strany 26 - I-2 Freescale Semiconductor

Interfacing DDR2 and DDR3 Memories with the i.MX53 Processori.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 6-3 6.2 i.MX53 Memor

Strany 27 - Design Checklist

Interfacing DDR2 and DDR3 Memories with the i.MX53 Processori.MX53 System Development User’s Guide, Rev. 16-4 Freescale Semiconductor Figure 6-3. DDR3

Strany 28

Interfacing DDR2 and DDR3 Memories with the i.MX53 Processori.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 6-5 wait = on//*====

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Interfacing DDR2 and DDR3 Memories with the i.MX53 Processori.MX53 System Development User’s Guide, Rev. 16-6 Freescale Semiconductor setmem /32 0x53f

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Interfacing DDR2 and DDR3 Memories with the i.MX53 Processori.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 6-7 setmem /32 0x63f

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Interfacing DDR2 and DDR3 Memories with the i.MX53 Processori.MX53 System Development User’s Guide, Rev. 16-8 Freescale Semiconductor //*=============

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Interfacing DDR2 and DDR3 Memories with the i.MX53 Processori.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 6-9 setmem /32 0x53f

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Interfacing DDR2 and DDR3 Memories with the i.MX53 Processori.MX53 System Development User’s Guide, Rev. 16-10 Freescale Semiconductor setmem /32 0x63

Strany 34 - 1.2 DDR Reference Circuit

Interfacing DDR2 and DDR3 Memories with the i.MX53 Processori.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 6-11 The SCh has a 3

Strany 35 - C Conflicts

i.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor xiii FiguresFigureNumber TitlePageNumber18-3 Graphics Support Options Menu...

Strany 36 - 1.4 JTAG Signal Termination

Interfacing DDR2 and DDR3 Memories with the i.MX53 Processori.MX53 System Development User’s Guide, Rev. 16-12 Freescale Semiconductor • tXPDLL = grea

Strany 37 - Chapter 2

Interfacing DDR2 and DDR3 Memories with the i.MX53 Processori.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 6-13 6.5.5 Timing Co

Strany 38 - 2-2 Freescale Semiconductor

Interfacing DDR2 and DDR3 Memories with the i.MX53 Processori.MX53 System Development User’s Guide, Rev. 16-14 Freescale Semiconductor

Strany 39 - 2.1.1 Fanout

i.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 7-1 Chapter 7 Avoiding Board Bring-Up ProblemsThis chapter provides recommendat

Strany 40 - 2.2 Stackup

Avoiding Board Bring-Up Problemsi.MX53 System Development User’s Guide, Rev. 17-2 Freescale Semiconductor 7.2 Using a Current Monitor to Avoid Power P

Strany 41 - Freescale Semiconductor 2-5

Avoiding Board Bring-Up Problemsi.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 7-3 7.5 Sample Board Bring-Up ChecklistTable 7-2

Strany 42

Avoiding Board Bring-Up Problemsi.MX53 System Development User’s Guide, Rev. 17-4 Freescale Semiconductor Measure boot mode frequencies. Set the boot

Strany 43 - 2.5 Routing Topologies

i.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 8-1 Chapter 8 Using the Clock Connectivity TableThis chapter explains how to us

Strany 44 - 2.5.1 1 Gbyte Topologies

Using the Clock Connectivity Tablei.MX53 System Development User’s Guide, Rev. 18-2 Freescale Semiconductor Clock connectivity is described in the in

Strany 45 - 2.5.2 2 Gbyte Topologies

Using the Clock Connectivity Tablei.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 8-3 Clock gating is done with the low power cl

Strany 46 - 2-10 Freescale Semiconductor

i.MX53 System Development User’s Guide, Rev. 1xiv Freescale Semiconductor FiguresFigureNumber TitlePageNumber

Strany 47 - Freescale Semiconductor 2-11

Using the Clock Connectivity Tablei.MX53 System Development User’s Guide, Rev. 18-4 Freescale Semiconductor

Strany 48 - 2.5.3 DDR2 Routing Examples

i.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 9-1 Chapter 9 Configuring JTAG Tools for DebuggingThis chapter explains how to

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Configuring JTAG Tools for Debuggingi.MX53 System Development User’s Guide, Rev. 19-2 Freescale Semiconductor Once the latest firmware is installed, f

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Configuring JTAG Tools for Debuggingi.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 9-3 3. Update the CoreSight base address as

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Configuring JTAG Tools for Debuggingi.MX53 System Development User’s Guide, Rev. 19-4 Freescale Semiconductor After following the recommended steps, t

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i.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor II-1 Part IISoftware DevelopmentThe chapters that follow aid you in software dev

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Software Developmenti.MX53 System Development User’s Guide, Rev. 1II-2 Freescale Semiconductor

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i.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 10-1 Chapter 10 Porting the On-Board-Diagnostic-Suite (OBDS) to a Custom BoardT

Strany 55 - Freescale Semiconductor 2-19

Porting the On-Board-Diagnostic-Suite (OBDS) to a Custom Boardi.MX53 System Development User’s Guide, Rev. 110-2 Freescale Semiconductor 10.2 Customiz

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Porting the On-Board-Diagnostic-Suite (OBDS) to a Custom Boardi.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 10-3 10.2.3 Audio

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i.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor xiv TablesTableNumber TitlePageNumberTab le s1-1 Design Checklist ...

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Porting the On-Board-Diagnostic-Suite (OBDS) to a Custom Boardi.MX53 System Development User’s Guide, Rev. 110-4 Freescale Semiconductor 10.2.8 Ethern

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i.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 11-1 Chapter 11 Porting U-Boot from an i.MX53 Reference Board to an i.MX53 Cust

Strany 60

Porting U-Boot from an i.MX53 Reference Board to an i.MX53 Custom Boardi.MX53 System Development User’s Guide, Rev. 111-2 Freescale Semiconductor NOTE

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Porting U-Boot from an i.MX53 Reference Board to an i.MX53 Custom Boardi.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 11-3 code

Strany 62 - 2.6 Power Recommendations

Porting U-Boot from an i.MX53 Reference Board to an i.MX53 Custom Boardi.MX53 System Development User’s Guide, Rev. 111-4 Freescale Semiconductor All

Strany 63 - 2.9 LVDS Recommendations

Porting U-Boot from an i.MX53 Reference Board to an i.MX53 Custom Boardi.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 11-5 Err:

Strany 64 - 2.10 Reference Resistors

Porting U-Boot from an i.MX53 Reference Board to an i.MX53 Custom Boardi.MX53 System Development User’s Guide, Rev. 111-6 Freescale Semiconductor

Strany 65 - Freescale Semiconductor 2-29

i.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 12-1 Chapter 12 Porting the Android KernelAndroid releases for the i.MX53 proce

Strany 66 - 2-30 Freescale Semiconductor

Porting the Android Kerneli.MX53 System Development User’s Guide, Rev. 112-2 Freescale Semiconductor 12.2.1 Enabling and Disabling Default ResourcesUs

Strany 67 - Understanding the IBIS Model

Porting the Android Kerneli.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 12-3 12.2.2 Changing the Configuration FileAfter the s

Strany 68 - 3.2 Header Information

i.MX53 System Development User’s Guide, Rev. 1xv Freescale Semiconductor TablesTableNumber TitlePageNumber18-6 720P TV Example Variables ...

Strany 69

Porting the Android Kerneli.MX53 System Development User’s Guide, Rev. 112-4 Freescale Semiconductor Android's memory map hardcodes three of its

Strany 70 - 3.4 Model Information

Porting the Android Kerneli.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 12-5 12.4 Modifying the init.rc Partition LocationsThe

Strany 71

Porting the Android Kerneli.MX53 System Development User’s Guide, Rev. 112-6 Freescale Semiconductor Most enhancement implementations are located at k

Strany 72 - 3-6 Freescale Semiconductor

i.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 13-1 Chapter 13 Configuring the IOMUX Controller (IOMUXC)Before using the i.MX5

Strany 73 - 3.5 Model Golden Waveforms

Configuring the IOMUX Controller (IOMUXC)i.MX53 System Development User’s Guide, Rev. 113-2 Freescale Semiconductor – PUS (2 bits pull up/down configu

Strany 74 - 3.6.2 [Model Selector] gpio

Configuring the IOMUX Controller (IOMUXC)i.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 13-3 • pi—PAD Control Offset13.2.2 Conf

Strany 75 - 3.6.4 [Model Selector] uhvio

Configuring the IOMUX Controller (IOMUXC)i.MX53 System Development User’s Guide, Rev. 113-4 Freescale Semiconductor // Set pin as 0reg = readl(GPIO7_B

Strany 76

Configuring the IOMUX Controller (IOMUXC)i.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 13-5 The variables are as follows:• 0x6

Strany 77 - 3.8 References

Configuring the IOMUX Controller (IOMUXC)i.MX53 System Development User’s Guide, Rev. 113-6 Freescale Semiconductor Define the pad on iomux-mx53.h fil

Strany 78 - 3-12 Freescale Semiconductor

i.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 14-1 Chapter 14 Registering a New UART DriverBecause Linux already has a UART d

Strany 79 - Using the IOMUX Design Aid

i.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor xvi About This GuideThe i.MX53 multimedia applications processor (i.MX53) is Fre

Strany 80 - 4-2 Freescale Semiconductor

Registering a New UART Driveri.MX53 System Development User’s Guide, Rev. 114-2 Freescale Semiconductor 14.2 Enabling UART on Kernel MenuconfigEnable

Strany 81 - Freescale Semiconductor 4-3

Registering a New UART Driveri.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 14-3 Table 14-2 lists the UART files that are avail

Strany 82 - 4-4 Freescale Semiconductor

Registering a New UART Driveri.MX53 System Development User’s Guide, Rev. 114-4 Freescale Semiconductor

Strany 83 - Freescale Semiconductor 4-5

i.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 15-1 Chapter 15 Adding Support for the i.MX53 ESDHCThis chapter explains how to

Strany 84 - 4-6 Freescale Semiconductor

Adding Support for the i.MX53 ESDHCi.MX53 System Development User’s Guide, Rev. 115-2 Freescale Semiconductor 15.2 Including Support for SD1/SD2/SD3/S

Strany 85 - Freescale Semiconductor 4-7

Adding Support for the i.MX53 ESDHCi.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 15-3 { .flags = IORESOURCE_IRQ, },}

Strany 86 - 4-8 Freescale Semiconductor

Adding Support for the i.MX53 ESDHCi.MX53 System Development User’s Guide, Rev. 115-4 Freescale Semiconductor 400 KHz and 50 MHz. sdhc_get_card_det_st

Strany 87 - Freescale Semiconductor 4-9

Adding Support for the i.MX53 ESDHCi.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 15-5 ...}; Then link GPIO interrupts with st

Strany 88 - 4-10 Freescale Semiconductor

Adding Support for the i.MX53 ESDHCi.MX53 System Development User’s Guide, Rev. 115-6 Freescale Semiconductor 15.3.1 ESDHC Interface FeaturesThe ESDHC

Strany 89 - Freescale Semiconductor 4-11

Adding Support for the i.MX53 ESDHCi.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 15-7 transmission level. The i.MX53 ESDHC inc

Strany 90 - 4-12 Freescale Semiconductor

About This Guidei.MX53 System Development User’s Guide, Rev. 1xvii Freescale Semiconductor OrganizationThis guide is a compendium of application notes

Strany 91 - 4.5 IOMUX Features Guide

Adding Support for the i.MX53 ESDHCi.MX53 System Development User’s Guide, Rev. 115-8 Freescale Semiconductor Figure 15-2 shows another example i.MX53

Strany 92 - 4.5.2.1 File Menu

i.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 16-1 Chapter 16 Configuring the SPI NOR Flash Memory Technology Device (MTD) Dr

Strany 93 - 4.5.2.3 View Menu

Configuring the SPI NOR Flash Memory Technology Device (MTD) Driveri.MX53 System Development User’s Guide, Rev. 116-2 Freescale Semiconductor NOTEIf y

Strany 94 - 4.5.5.1 Signals Tab

Configuring the SPI NOR Flash Memory Technology Device (MTD) Driveri.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 16-3 Bootload

Strany 95 - 4.5.5.2 Ball Diagram Tab

Configuring the SPI NOR Flash Memory Technology Device (MTD) Driveri.MX53 System Development User’s Guide, Rev. 116-4 Freescale Semiconductor 16.4.3 C

Strany 96 - 4-18 Freescale Semiconductor

Configuring the SPI NOR Flash Memory Technology Device (MTD) Driveri.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 16-5 16.6 Sof

Strany 97 - Chapter 5

Configuring the SPI NOR Flash Memory Technology Device (MTD) Driveri.MX53 System Development User’s Guide, Rev. 116-6 Freescale Semiconductor

Strany 98 - Figure 5-1. Internal LDOs

i.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 17-1 Chapter 17 Setting Up the Keypad Port (KPP)The KPP is designed to interfac

Strany 99 - VB UCKC OR E

Setting Up the Keypad Port (KPP)i.MX53 System Development User’s Guide, Rev. 117-2 Freescale Semiconductor 17.2 Creating a Custom KeymapThe input.h fi

Strany 100 - Setting up Power Management

Setting Up the Keypad Port (KPP)i.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 17-3 3. Add the keymapping matrix as follows:sta

Strany 101

About This Guidei.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor xviii • Chapter 21, “Porting Audio Codecs to a Custom Board”• Ch

Strany 102 - Figure 5-3. Power Connections

Setting Up the Keypad Port (KPP)i.MX53 System Development User’s Guide, Rev. 117-4 Freescale Semiconductor Evtest displays the information of every ke

Strany 103 - DA9053

i.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 18-1 Chapter 18 Supporting the i.MX53 Reference Board DISP0 LCDThis chapter exp

Strany 104 - Figure 5-3 and Figure 5-4

Supporting the i.MX53 Reference Board DISP0 LCDi.MX53 System Development User’s Guide, Rev. 118-2 Freescale Semiconductor 18.1 Supported Display Inter

Strany 105 - C Interface

Supporting the i.MX53 Reference Board DISP0 LCDi.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 18-3 18.2 Adding Support for an L

Strany 106 - 5.4 Interface Table

Supporting the i.MX53 Reference Board DISP0 LCDi.MX53 System Development User’s Guide, Rev. 118-4 Freescale Semiconductor Figure 18-2 shows the interf

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Supporting the i.MX53 Reference Board DISP0 LCDi.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 18-5 18.3 Modifying Boot Kernel P

Strany 108 - NVCC_EIM_DRAM

Supporting the i.MX53 Reference Board DISP0 LCDi.MX53 System Development User’s Guide, Rev. 118-6 Freescale Semiconductor When <name> is include

Strany 109 - Freescale Semiconductor 5-13

Supporting the i.MX53 Reference Board DISP0 LCDi.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 18-7 Table 18-5 shows how the val

Strany 110 - Optional

Supporting the i.MX53 Reference Board DISP0 LCDi.MX53 System Development User’s Guide, Rev. 118-8 Freescale Semiconductor For example, the kernel comm

Strany 111 - Freescale Semiconductor 5-15

Supporting the i.MX53 Reference Board DISP0 LCDi.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 18-9 The video parameter format i

Strany 112 - 5-16 Freescale Semiconductor

Freescale and the Freescale logo are trademarks of Freescale Semiconductor, Inc. Reg. U.S. Pat. & Tm. Off. All other product or service names are

Strany 113 - 5.6.1 DA9053

About This Guidei.MX53 System Development User’s Guide, Rev. 1xix Freescale Semiconductor Book titles in text are set in italicssig_name Internal sign

Strany 114 - 5-18 Freescale Semiconductor

Supporting the i.MX53 Reference Board DISP0 LCDi.MX53 System Development User’s Guide, Rev. 118-10 Freescale Semiconductor 18.4 Adding Support for a N

Strany 115

Supporting the i.MX53 Reference Board DISP0 LCDi.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 18-11 config FB_MXC_CLAA057VA01C

Strany 116 - 5.6.2 LTC3589-1

Supporting the i.MX53 Reference Board DISP0 LCDi.MX53 System Development User’s Guide, Rev. 118-12 Freescale Semiconductor },}; Be careful to use t

Strany 117 - 9729

Supporting the i.MX53 Reference Board DISP0 LCDi.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 18-13 Note that a new object, mxc

Strany 118 - 5-22 Freescale Semiconductor

Supporting the i.MX53 Reference Board DISP0 LCDi.MX53 System Development User’s Guide, Rev. 118-14 Freescale Semiconductor };Use this new mxc_fb_platf

Strany 119 - Processor

Supporting the i.MX53 Reference Board DISP0 LCDi.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 18-15 return 0;}4. Modify the

Strany 120 - 6-2 Freescale Semiconductor

Supporting the i.MX53 Reference Board DISP0 LCDi.MX53 System Development User’s Guide, Rev. 118-16 Freescale Semiconductor The example board’s two dis

Strany 121 - 6.2 i.MX53 Memory Interface

i.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 19-1 Chapter 19 Connecting an LVDS Panel to an i.MX53 Reference BoardThis chapt

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Connecting an LVDS Panel to an i.MX53 Reference Boardi.MX53 System Development User’s Guide, Rev. 119-2 Freescale Semiconductor The LVDS channel mapp

Strany 123

Connecting an LVDS Panel to an i.MX53 Reference Boardi.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 19-3 19.3 LDB PortsFigure

Strany 124

About This Guidei.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor xx CODEC Coder/decoder or compression/decompression algorithm—Us

Strany 125

Connecting an LVDS Panel to an i.MX53 Reference Boardi.MX53 System Development User’s Guide, Rev. 119-4 Freescale Semiconductor 19.3.1 Input Parallel

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i.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 20-1 Chapter 20 Supporting the i.MX53 Camera Sensor Interface CSI0This chapter

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Supporting the i.MX53 Camera Sensor Interface CSI0i.MX53 System Development User’s Guide, Rev. 120-2 Freescale Semiconductor 20.2 i.MX53 CSI Interfac

Strany 128 - 6.5.1 Main Control Register

Supporting the i.MX53 Camera Sensor Interface CSI0i.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 20-3 20.4 Adding Support for

Strany 129 - 6.5.2 Power Down Register

Supporting the i.MX53 Camera Sensor Interface CSI0i.MX53 System Development User’s Guide, Rev. 120-4 Freescale Semiconductor $ gedit Kconfig &3.

Strany 130 - 15 14 12 11 9 8 5 4 3 2 0

Supporting the i.MX53 Camera Sensor Interface CSI0i.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 20-5 After the functions have

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Supporting the i.MX53 Camera Sensor Interface CSI0i.MX53 System Development User’s Guide, Rev. 120-6 Freescale Semiconductor 2. Open the i.MX53 came

Strany 132 - 6-14 Freescale Semiconductor

Supporting the i.MX53 Camera Sensor Interface CSI0i.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 20-7 au8Buf[2] = val; if

Strany 133 - Chapter 7

Supporting the i.MX53 Camera Sensor Interface CSI0i.MX53 System Development User’s Guide, Rev. 120-8 Freescale Semiconductor Check ov3640.c for the c

Strany 134 - 7.4 Avoiding Reset Pitfalls

Supporting the i.MX53 Camera Sensor Interface CSI0i.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 20-9 20.6 Loading and Testing

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About This Guidei.MX53 System Development User’s Guide, Rev. 1xxi Freescale Semiconductor IrDA Infrared Data Association—a nonprofit organization whos

Strany 136

Supporting the i.MX53 Camera Sensor Interface CSI0i.MX53 System Development User’s Guide, Rev. 120-10 Freescale Semiconductor 20.7.1 CMOS Interfaces

Strany 137 - Chapter 8

Supporting the i.MX53 Camera Sensor Interface CSI0i.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 20-11 For details, refer to t

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Supporting the i.MX53 Camera Sensor Interface CSI0i.MX53 System Development User’s Guide, Rev. 120-12 Freescale Semiconductor interface such as the I

Strany 139 - Freescale Semiconductor 8-3

Supporting the i.MX53 Camera Sensor Interface CSI0i.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 20-13 Section 20.7.3, “Timing

Strany 140 - 8-4 Freescale Semiconductor

Supporting the i.MX53 Camera Sensor Interface CSI0i.MX53 System Development User’s Guide, Rev. 120-14 Freescale Semiconductor

Strany 141 - Chapter 9

i.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 21-1 Chapter 21 Porting Audio Codecs to a Custom BoardThis chapter explains how

Strany 142 - 9-2 Freescale Semiconductor

Porting Audio Codecs to a Custom Boardi.MX53 System Development User’s Guide, Rev. 121-2 Freescale Semiconductor 21.2 Porting the Reference BSP to a C

Strany 143 - 4. Save the configuration

Porting Audio Codecs to a Custom Boardi.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 21-3 NOTEIf using a different codec, adapt

Strany 144 - 9-4 Freescale Semiconductor

Porting Audio Codecs to a Custom Boardi.MX53 System Development User’s Guide, Rev. 121-4 Freescale Semiconductor

Strany 145 - Software Development

i.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 22-1 Chapter 22 Porting the Fast Ethernet Controller DriverThis chapter explain

Strany 146 - II-2 Freescale Semiconductor

About This Guidei.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor xxii RGBA RGBA color space stands for Red Green Blue Alpha. The

Strany 147 - Chapter 10

Porting the Fast Ethernet Controller Driveri.MX53 System Development User’s Guide, Rev. 122-2 Freescale Semiconductor 22.2 Source CodeThe source code

Strany 148 - 10.2.2 DDR Test

i.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 23-1 Chapter 23 Porting USB Host1 and USB OTGThe USB Host1 and the USB OTG sign

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Porting USB Host1 and USB OTGi.MX53 System Development User’s Guide, Rev. 123-2 Freescale Semiconductor

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i.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor A-3 Appendix A Revision HistoryTable A-1 provides a revision history for this u

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Revision Historyi.MX53 System Development User’s Guide, Rev. 1A-4 Freescale Semiconductor

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Revision Historyi.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor A-5

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About This Guidei.MX53 System Development User’s Guide, Rev. 1xxiii Freescale Semiconductor

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i.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor I-1 Part IHardware Design and Bring-upThe chapters that follow cover topics that

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Hardware Design and Bring-upi.MX53 System Development User’s Guide, Rev. 1I-2 Freescale Semiconductor

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i.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 1-1 Chapter 1 Design ChecklistThis chapter provides a design checklist for i.MX

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Design Checklisti.MX53 System Development User’s Guide, Rev. 11-2 Freescale Semiconductor EIM Recommendations3. When EIM boot signals are used as the

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Design Checklisti.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 1-3 JTAG Recommendations9. Do not use external pull-up or pull-d

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i.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor iii ContentsParagraphNumber TitlePageNumberContentsAbout This GuideAudience ...

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Design Checklisti.MX53 System Development User’s Guide, Rev. 11-4 Freescale Semiconductor Miscellaneous Signal Recommendations16. Tie FASTR_ANA and FA

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Design Checklisti.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 1-5 25. USB I/O D+, D–, and UID contacts on the i.MX device requ

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Design Checklisti.MX53 System Development User’s Guide, Rev. 11-6 Freescale Semiconductor 30. If feeding an external clock into the device, CKIL can b

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Design Checklisti.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 1-7 SATA Recommendations34. The impedance calibration process re

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Design Checklisti.MX53 System Development User’s Guide, Rev. 11-8 Freescale Semiconductor 1.1 Boot Configuration Bus Isolation ResistorsFigure 1-1 sho

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Design Checklisti.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 1-9 1.3 Avoiding I2C ConflictsTable 1-3 shows a spreadsheet for

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Design Checklisti.MX53 System Development User’s Guide, Rev. 11-10 Freescale Semiconductor 1.4 JTAG Signal TerminationTable 1-5 is a JTAG termination

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i.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 2-1 Chapter 2 i.MX53 Layout RecommendationsThis chapter provides recommendation

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i.MX53 Layout Recommendationsi.MX53 System Development User’s Guide, Rev. 12-2 Freescale Semiconductor Figure 2-2. i.MX53 Package InformationMaintaini

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i.MX53 Layout Recommendationsi.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 2-3 2.1.1 FanoutFigure 2-3 shows the fanouts for th

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i.MX53 System Development User’s Guide, Rev. 1iv Freescale Semiconductor ContentsParagraphNumber TitlePageNumberChapter 3 Understanding the IBIS Mode

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i.MX53 Layout Recommendationsi.MX53 System Development User’s Guide, Rev. 12-4 Freescale Semiconductor 2.2 StackupHigh-speed design requires a good st

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i.MX53 Layout Recommendationsi.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 2-5 2.3 DDR Connection InformationThe DDR2 and DDR3

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i.MX53 Layout Recommendationsi.MX53 System Development User’s Guide, Rev. 12-6 Freescale Semiconductor and keep the propagation delay to the minimum.

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i.MX53 Layout Recommendationsi.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 2-7 Routing by byte group requires better control o

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i.MX53 Layout Recommendationsi.MX53 System Development User’s Guide, Rev. 12-8 Freescale Semiconductor 2.5.1 1 Gbyte TopologiesThe 1 Gbyte option has

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i.MX53 Layout Recommendationsi.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 2-9 If the data bus is two byte groups by memory, t

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i.MX53 Layout Recommendationsi.MX53 System Development User’s Guide, Rev. 12-10 Freescale Semiconductor The ADDR/CMD signals should be routed as shown

Strany 178 - Table 15-2. ESDHC Pins

i.MX53 Layout Recommendationsi.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 2-11 Figure 2-15 shows the clock routing topology.F

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i.MX53 Layout Recommendationsi.MX53 System Development User’s Guide, Rev. 12-12 Freescale Semiconductor 2.5.3 DDR2 Routing ExamplesFigure 2-16–Figure

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i.MX53 Layout Recommendationsi.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 2-13 Figure 2-17. Internal 1 DDR2 RoutingColor Lege

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i.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor v ContentsParagraphNumber TitlePageNumberChapter 5 Setting up Power Management5

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i.MX53 Layout Recommendationsi.MX53 System Development User’s Guide, Rev. 12-14 Freescale Semiconductor Figure 2-18. Power Plane 1 DDR2 Routing Color

Strany 183 - Table 16-3. CSPI Parameters

i.MX53 Layout Recommendationsi.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 2-15 Figure 2-19. Power Plane 2 DDR2 Routing Color

Strany 184 - 16.5 Hardware Operation

i.MX53 Layout Recommendationsi.MX53 System Development User’s Guide, Rev. 12-16 Freescale Semiconductor Figure 2-20. Internal 2 DDR2 Routing Color Leg

Strany 185 - 16.6 Software Operation

i.MX53 Layout Recommendationsi.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 2-17 Figure 2-21. Bottom DDR2 Routing Color LegendC

Strany 186 - 16-6 Freescale Semiconductor

i.MX53 Layout Recommendationsi.MX53 System Development User’s Guide, Rev. 12-18 Freescale Semiconductor Table 2-3 shows the total etch of the signals

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i.MX53 Layout Recommendationsi.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 2-19 2.5.4 2-Gbyte Routing ExamplesFigure 2-22–Figu

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i.MX53 Layout Recommendationsi.MX53 System Development User’s Guide, Rev. 12-20 Freescale Semiconductor Figure 2-22. Top 8-DDR3 Routing Color LegendCo

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i.MX53 Layout Recommendationsi.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 2-21 Figure 2-23. Internal 1 8-DDR3 Routing Color L

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i.MX53 Layout Recommendationsi.MX53 System Development User’s Guide, Rev. 12-22 Freescale Semiconductor Figure 2-24. Power Plane 1 8-DDR3 Routing Colo

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i.MX53 Layout Recommendationsi.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 2-23 Figure 2-25. Power Plane 2 8-DDR3 RoutingColor

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i.MX53 System Development User’s Guide, Rev. 1vi Freescale Semiconductor ContentsParagraphNumber TitlePageNumberChapter 8 Using the Clock Connectivit

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i.MX53 Layout Recommendationsi.MX53 System Development User’s Guide, Rev. 12-24 Freescale Semiconductor Figure 2-26. Internal 2 8-DDR3 Routing Color L

Strany 194 - Table 18-2. Timing Parameters

i.MX53 Layout Recommendationsi.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 2-25 Figure 2-27. Bottom 8-DDR3 Routing Color Legen

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i.MX53 Layout Recommendationsi.MX53 System Development User’s Guide, Rev. 12-26 Freescale Semiconductor Table 2-4 shows the total etch of the signals

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i.MX53 Layout Recommendationsi.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 2-27 • Decouple using distributed 0.01 μF and 0.1 μ

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i.MX53 Layout Recommendationsi.MX53 System Development User’s Guide, Rev. 12-28 Freescale Semiconductor Figure 2-28 shows the dimensions of a striplin

Strany 198 - Parameters

i.MX53 Layout Recommendationsi.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 2-29 • USB_OTG_RREFEXT•SATA_REXT• LVDS_BG_RES• TVDA

Strany 199 - Table 18-7. Sample Values

i.MX53 Layout Recommendationsi.MX53 System Development User’s Guide, Rev. 12-30 Freescale Semiconductor

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i.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 3-1 Chapter 3 Understanding the IBIS ModelThis chapter explains how to use the

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Understanding the IBIS Modeli.MX53 System Development User’s Guide, Rev. 13-2 Freescale Semiconductor 3.2 Header InformationThe first section of an IB

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Understanding the IBIS Modeli.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 3-3 Example 3-2. Component and Pin Information[Compo

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i.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor vii ContentsParagraphNumber TitlePageNumber12.2.2 Changing the Configuration Fil

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Understanding the IBIS Modeli.MX53 System Development User’s Guide, Rev. 13-4 Freescale Semiconductor 3.4 Model InformationThe [Model Selector] keywor

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Understanding the IBIS Modeli.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 3-5 3.4.1 Ramp and Waveform KeywordsTable 3-3 define

Strany 206 - 18-16 Freescale Semiconductor

Understanding the IBIS Modeli.MX53 System Development User’s Guide, Rev. 13-6 Freescale Semiconductor • [Ramp] effectively averages the transitions of

Strany 207 - Chapter 19

Understanding the IBIS Modeli.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 3-7 3.5 Model Golden WaveformsGolden waveforms are a

Strany 208 - 19.2.2 Programming Interface

Understanding the IBIS Modeli.MX53 System Development User’s Guide, Rev. 13-8 Freescale Semiconductor 3.6.1 [Model Selector] ddrThis model has the fol

Strany 209 - 19.3 LDB Ports

Understanding the IBIS Modeli.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 3-9 3.6.3 [Model Selector] lvioThis model has no con

Strany 210 - 19.4 Further Reading

Understanding the IBIS Modeli.MX53 System Development User’s Guide, Rev. 13-10 Freescale Semiconductor 3.6.5 List of Pins Not Modeled in the i.MX53 IB

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Understanding the IBIS Modeli.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 3-11 Correlation Level A means for categorizing I/O

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Understanding the IBIS Modeli.MX53 System Development User’s Guide, Rev. 13-12 Freescale Semiconductor

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i.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 4-1 Chapter 4 Using the IOMUX Design AidThis chapter explains how to use of the

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i.MX53 System Development User’s Guide, Rev. 1viii Freescale Semiconductor ContentsParagraphNumber TitlePageNumberChapter 16 Configuring the SPI NOR

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Using the IOMUX Design Aidi.MX53 System Development User’s Guide, Rev. 14-2 Freescale Semiconductor 4.2.1 Identifying Signal Conflicts with the Signal

Strany 216 - 20.5 Using the I

Using the IOMUX Design Aidi.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 4-3 bolding indicates that UART2_CTS conflicts with UA

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Using the IOMUX Design Aidi.MX53 System Development User’s Guide, Rev. 14-4 Freescale Semiconductor Hovering the mouse over the same signal, UART3_TXD

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Using the IOMUX Design Aidi.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 4-5 Conflicts are resolved by reassigning signals. How

Strany 219 - Figure 20-3. Chessboard Test

Using the IOMUX Design Aidi.MX53 System Development User’s Guide, Rev. 14-6 Freescale Semiconductor In this example, the conflicts are resolved by ass

Strany 220 - 20-10 Freescale Semiconductor

Using the IOMUX Design Aidi.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 4-7 Figure 4-6 shows the signals tab after right-click

Strany 221 - Freescale Semiconductor 20-11

Using the IOMUX Design Aidi.MX53 System Development User’s Guide, Rev. 14-8 Freescale Semiconductor After the user enters the desired text and clicks

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Using the IOMUX Design Aidi.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 4-9 Once finished with changes, users should use File

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Using the IOMUX Design Aidi.MX53 System Development User’s Guide, Rev. 14-10 Freescale Semiconductor 4.3 Toggling the Alternate View of the Signals Ta

Strany 224 - 20-14 Freescale Semiconductor

Using the IOMUX Design Aidi.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 4-11 4.3.1 Finding Assigned Signal Locations with the

Strany 225 - Chapter 21

i.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor ix ContentsParagraphNumber TitlePageNumber18.4.5 Adding BSP Support for a New Bo

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Using the IOMUX Design Aidi.MX53 System Development User’s Guide, Rev. 14-12 Freescale Semiconductor 4.4 Using the Search Box to Find Specific Signals

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Using the IOMUX Design Aidi.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 4-13 4.5 IOMUX Features GuideThis section provides a g

Strany 228 - 21-4 Freescale Semiconductor

Using the IOMUX Design Aidi.MX53 System Development User’s Guide, Rev. 14-14 Freescale Semiconductor • View—used to change view settings• Help—used to

Strany 229 - Chapter 22

Using the IOMUX Design Aidi.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 4-15 4.5.2.2 Device MenuFigure 4-14 provides a partial

Strany 230 - 22.3 Ethernet Configuration

Using the IOMUX Design Aidi.MX53 System Development User’s Guide, Rev. 14-16 Freescale Semiconductor Update Conflicts This item cannot be enabled unle

Strany 231 - Porting USB Host1 and USB OTG

Using the IOMUX Design Aidi.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 4-17 The following list explains each column’s functio

Strany 232 - 23-2 Freescale Semiconductor

Using the IOMUX Design Aidi.MX53 System Development User’s Guide, Rev. 14-18 Freescale Semiconductor

Strany 233 - Revision History

i.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 5-1 Chapter 5 Setting up Power ManagementThis chapter discusses how to supply a

Strany 234 - A-4 Freescale Semiconductor

Setting up Power Managementi.MX53 System Development User’s Guide, Rev. 15-2 Freescale Semiconductor If either of these bits are cleared, the internal

Strany 235 - Freescale Semiconductor A-5

Setting up Power Managementi.MX53 System Development User’s Guide, Rev. 1Freescale Semiconductor 5-3 5.2 Interfacing the i.MX53 Processor with the DA9

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